When the first computer-based data acquisition systems were being designed, it was customary to map the hardware from where the data was to be acquired into registers in the acquisition processor's memory space. That provided a simple and intuitive interface to the processor which was capable of acquiring a word of data in one instruction cycle. As computer architectures evolved, however, the instruction cycles for processors shortened while the cycle time of acquisition buses did not. With those newer architectures, the execution time of an instruction was no longer comparable to the cycle time of an input/output ("I/O") bus. That increased the cost in terms of processor time for the processor to acquire data from peripheral hardware.
Newer computer memories are also so much faster that many modern computer architectures provide a private memory bus rather than putting the memory on the processor's I/O bus. That causes memory to become a very different device than an I/O register. An I/O access in terms of processor time then becomes far more expensive than a memory access. Any architecture that fails to distinguish between the two cannot be used to extract maximum performance from the system.
In order to reduce processor I/O processing time, peripherals have been designed with direct memory access (DMA) type interfaces. Rather than having the processor take the data from the peripherals and place it in memory, the interfaces were designed to take control of the main processor bus and directly place data into or take data out of memory with no processor involvement. DMA-type interfaces provide the highest possible memory transfer rates and reduce processor I/O processing time.
Many peripheral instruments in use today, however, not only do not have DMA capability but require processor intervention in order to gather data. Although such instruments could be redesigned so as not to require processor intervention and which would neatly package their data for the acquisition processor in blocks for DMA-type transfers, that would do little for the instruments that are already in the field and constitute a vast capital investment.
Transfer of data by peripheral devices via DMA without processor intervention, however, is especially suitable for computerized data acquisition applications. Computerized data acquisition systems can be based on what can be called a stream-type of architecture. That is, the system consists of a set of concurrently executing program modules communicating through streams of data. Data in streams provided by the peripheral devices is held in buffers which are reserved when the need arises and liberated when the data they hold is no longer needed. A memory-management system creates those buffers, keeps track of which ones contain viable data, and reallocates those whose data have expired. With the DMA mode of acquisition, the data would materialize at the top of the streams and flow through the rest of the system. There exists a need, therefore, for a means of implementing DMA in computerized data acquisition systems utilizing existing peripheral data-gathering devices without DMA capability.
Many types of data acquisition devices also require processor intervention in order to work properly, which places even further demands on the processor. For example, such processor interventions include inputs to the peripheral device to initiate data gathering and checking for completion of the data gathering operation.
Further adding to processor overhead is the fact that the data gathered from separate devices may be related, requiring the processor to manipulate the gathered data in some fashion before it is in a useful form. For example, two separate sources of data may need to interact. Processor overhead would be reduced if the data interaction could take place before being input to the processor.